From 952a179f4415823efbae3fa7d8d49f5fb878c89e Mon Sep 17 00:00:00 2001
From: Cayetano Santos <csantosb@inventati.org>
Date: Tue, 29 Oct 2024 09:55:46 +0100
Subject: gnu: Add yosys-clang.
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* gnu/packages/fpga.scm (yosys-clang): New variable.

Change-Id: Iedbd418adc152c325d106830d9d33b73f01e65da
Signed-off-by: Ludovic Courtès <ludo@gnu.org>
---
 gnu/packages/fpga.scm | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

(limited to 'gnu/packages/fpga.scm')

diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
index df0652ae44..8e3ee00122 100644
--- a/gnu/packages/fpga.scm
+++ b/gnu/packages/fpga.scm
@@ -239,6 +239,26 @@ (define-public yosys
     (description "Yosys synthesizes Verilog-2005.")
     (license license:isc)))
 
+(define-public yosys-clang
+  (package
+    (inherit yosys)
+    (name "yosys-clang")
+    (arguments
+     (substitute-keyword-arguments (package-arguments yosys)
+       ((#:make-flags _ #f)
+        #~(list "CC=clang"
+                "CXX=clang++"
+                (string-append "PREFIX=" #$output)))
+       ((#:phases phases)
+        #~(modify-phases #$phases
+            (replace 'configure
+              (lambda* (#:key make-flags #:allow-other-keys)
+                (apply invoke "make" "config-clang" make-flags)))))))
+    (inputs
+     (modify-inputs (package-inputs yosys)
+       (append clang)))
+    (synopsis "FPGA Verilog RTL synthesizer (Clang variant)")))
+
 (define-public icestorm
   (let ((commit "2bc541743ada3542c6da36a50e66303b9cbd2059")
         (revision "4"))
-- 
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